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  #1   Report Post  
Watson A.Name - \Watt Sun, the Dark Remover\
 
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Default Different Audio Design

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.



--
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that will give you a choice and save you money(up to half).
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  #2   Report Post  
Rich Grise
 
Posts: n/a
Default

On Wed, 17 Nov 2004 00:18:38 -0800, Watson A.Name - "Watt Sun, the Dark Remover" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.


Hey, Watson. :-)

I'm going to level with you, I'm not an expert, I just play one on the
internet. But it looks to me like the gain of the output stage - you're
talking about the one with an opamp per each output tranny, right? - is
strapped such that the opamp's loop gain predominates, and I would not be
a bit surprised to see the circuit behave just as you describe (emitter
followers are notoriously fast), with two caveats: The slew rate of the
opamps, and something about a pole or a zero in the complex impedance at
that horrendous huge output cap.

But that's just a butt-level[0] feeling, so take it for what it's
worth, and let any uselessness go. :-)

Cheers!
Rich

[0] i.e., seat-of-the pants driving by a bench tech. ;-)

  #3   Report Post  
Robert Baer
 
Posts: n/a
Default

"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Start with the "obvious" DC initial conditions: pins 5 and 6 are at
1/2 of the supply voltage.
Note average DC current thru R4 must be exactly zero (am assuming zero
input bias current in op amps and zero leakage current for C6 and C7).
Then pins 7, 9, 10, 12 and 13 are all within an op-amp Vos of 1/2 of
the supply voltage.
Now we see the dicey part; theoretically (acting seperately), opamp C
will drive Q1 until the inputs "see" its Vos, and opamp D would drive Q2
until the inputs "see" its Vos.
Housesomever, zee soykut iss a mess.
The input conditions that opamp C will try to satisfy is virtually
*guaranteed* to be different than the input conditions that opamp D will
try to satisfy (the Vos of one will be different than the Vos of the
other).
Ignoring that feedback, the conclusion seems to be that the opamp with
the greater open loop power gain (that includes the transistor) will
(mostly) win, meaning the other transistor will either be driven to
saturation or zener E-B breakdown.
But, remember that no DC current can flow thru R4.
It *does* appear that your supposition of oscillation is correct.
Now, replace the transistors with E-to-B resistors and one still has
the problem.
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.
  #4   Report Post  
Watson A.Name - \Watt Sun, the Dark Remover\
 
Posts: n/a
Default


"Rich Grise" wrote in message
news
On Wed, 17 Nov 2004 00:18:38 -0800, Watson A.Name - "Watt Sun, the

Dark Remover" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either

output
transistor because there's no forward bias, then the V drop

'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop

gain
increases to the open loop gain. So it would seem that the amp

would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.


Hey, Watson. :-)

I'm going to level with you, I'm not an expert, I just play one on the
internet. But it looks to me like the gain of the output stage -

you're
talking about the one with an opamp per each output tranny, right? -

is
strapped such that the opamp's loop gain predominates, and I would not

be
a bit surprised to see the circuit behave just as you describe

(emitter
followers are notoriously fast), with two caveats: The slew rate of

the
opamps, and something about a pole or a zero in the complex impedance

at
that horrendous huge output cap.

But that's just a butt-level[0] feeling, so take it for what it's
worth, and let any uselessness go. :-)

Cheers!
Rich

[0] i.e., seat-of-the pants driving by a bench tech. ;-)


One never sees this configuration used in comm'l designs, so I figure
there must be a reason, such as problems with stability. I would do a
few things, like put fuses in the emitters of the power output
transistors.


  #5   Report Post  
Watson A.Name - \Watt Sun, the Dark Remover\
 
Posts: n/a
Default


"Robert Baer" wrote in message
...
"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either

output
transistor because there's no forward bias, then the V drop

'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop

gain
increases to the open loop gain. So it would seem that the amp

would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Start with the "obvious" DC initial conditions: pins 5 and 6 are at
1/2 of the supply voltage.
Note average DC current thru R4 must be exactly zero (am assuming

zero
input bias current in op amps and zero leakage current for C6 and C7).
Then pins 7, 9, 10, 12 and 13 are all within an op-amp Vos of 1/2 of
the supply voltage.
Now we see the dicey part; theoretically (acting seperately), opamp

C
will drive Q1 until the inputs "see" its Vos, and opamp D would drive

Q2
until the inputs "see" its Vos.
Housesomever, zee soykut iss a mess.
The input conditions that opamp C will try to satisfy is virtually
*guaranteed* to be different than the input conditions that opamp D

will
try to satisfy (the Vos of one will be different than the Vos of the
other).
Ignoring that feedback, the conclusion seems to be that the opamp

with
the greater open loop power gain (that includes the transistor) will
(mostly) win, meaning the other transistor will either be driven to
saturation or zener E-B breakdown.
But, remember that no DC current can flow thru R4.
It *does* appear that your supposition of oscillation is correct.
Now, replace the transistors with E-to-B resistors and one still has
the problem.
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.


But they say it works. Well.




  #6   Report Post  
Arny Krueger
 
Posts: n/a
Default

"Watson A.Name - "Watt Sun, the Dark Remover""
wrote in message

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm


When the amp is idle, and there's no(?) current flowing in either
output transistor because there's no forward bias, then the V drop
'resistance' of the E-B junction adds to the 100k feedback resistor,
so the loop gain increases to the open loop gain. So it would seem
that the amp would attempt to hunt in this region, possibly
oscillating?


Depends on the op amp. I stopped taking this circuit page seriously when I
saw "741" on the upper two circuit diagrams.

Do you know what a 741 is from the standpoint of quality audio? Anathema!

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.


It's a variation on what some designers call "current dumping".

However let's say the truth - this is an outdated, amateurish design with no
known merits over established technology.


  #7   Report Post  
Rich Grise
 
Posts: n/a
Default

On Wed, 17 Nov 2004 05:42:37 -0800, Watson A.Name - "Watt Sun, the Dark

"Robert Baer" wrote in message

....
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.


But they say it works. Well.

^^^^

Is this an adverb, or an interjection? ;-)

Thanks,
Rich

  #8   Report Post  
Dave Platt
 
Posts: n/a
Default

In article ,
Rich Grise wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.


Hey, Watson. :-)

I'm going to level with you, I'm not an expert, I just play one on the
internet. But it looks to me like the gain of the output stage - you're
talking about the one with an opamp per each output tranny, right? - is
strapped such that the opamp's loop gain predominates, and I would not be
a bit surprised to see the circuit behave just as you describe (emitter
followers are notoriously fast), with two caveats: The slew rate of the
opamps, and something about a pole or a zero in the complex impedance at
that horrendous huge output cap.


I'm not an expert either, but I have a Bad Feeling about this design.
It seems to me that it assumes the existence of theoretically-perfect
components with ideal matching (between IC2 and IC2, and between the
various Tr1 and Tr2 parallel transistors).

I'd be very concerned about the effect of any input offset voltage
difference which might exist between IC2 and IC3. It looks to me as
if the two op amps could end up "fighting" one another pretty badly.
If the input offset voltages are offset from one another in one
direction, the bias in the output transistors would probably tend down
towards zero, and distortion might result. If the offsets are in the
opposite direction, (e.g. if IC2 wanted to see a slightly more
positive voltage on its inverting input than IC1 did, for a given
noninverting input voltage) then the op amp output voltages would
diverge in opposite directions, turning both Tr1 and Tr2 quite hard,
and quite possibly driving them out of their safe operating areas.

Add to this the fact that the design doesn't include base resistors
for the transistors, or emitter ballast resistors for the paralleled
Tr1 and Tr2 transistor clusters, and I think you've got a recipe for
serious instability (oscillatory and thermal) and for the emission of
copious quantities of Magic Blue Smoke.

--
Dave Platt AE6EO
Hosting the Jade Warrior home page: http://www.radagast.org/jade-warrior
I do _not_ wish to receive unsolicited commercial email, and I will
boycott any company which has the gall to send me such ads!
  #9   Report Post  
Jim Meyer
 
Posts: n/a
Default

"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote in message ...
Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?


I just simulated the circuit in LTSpice using LT1113's instead of
the TL084. It simulates quite nicely. The feedback causes the base
drives to swing through the "crossover" region so that's no problem.

Here's a "cut-n-paste" ASCII file for the input to LTSpice:

Version 4
SHEET 1 880 680
WIRE -16 384 16 384
WIRE 144 144 48 144
WIRE 16 144 16 384
WIRE 16 384 144 384
WIRE 144 112 96 112
WIRE 96 112 96 240
WIRE 96 352 144 352
WIRE 208 128 288 128
WIRE 208 368 288 368
WIRE 352 176 352 240
WIRE 352 416 352 464
WIRE 352 80 352 32
WIRE 96 240 352 240
WIRE 96 240 96 352
WIRE 352 240 352 320
WIRE 496 240 448 240
WIRE 448 512 448 480
WIRE 448 416 448 368
WIRE 448 288 448 240
WIRE 448 240 352 240
WIRE 560 240 592 240
WIRE 624 240 624 336
WIRE 624 416 624 512
WIRE -16 240 96 240
WIRE -96 240 -128 240
WIRE -128 240 -128 368
WIRE -128 368 -160 368
WIRE -80 368 -128 368
WIRE -320 368 -288 368
WIRE -288 432 -288 368
WIRE -288 368 -240 368
WIRE -288 496 -288 528
WIRE -480 416 -480 368
WIRE -480 368 -384 368
WIRE -480 496 -480 528
WIRE -400 0 -400 48
WIRE -256 48 -256 0
WIRE -80 400 -128 400
WIRE -128 400 -128 448
WIRE 592 240 624 240
WIRE 48 144 16 144
FLAG 176 96 +14
FLAG 176 336 +14
FLAG 352 32 +14
FLAG 176 160 0
FLAG 176 400 0
FLAG 352 464 0
FLAG 448 512 0
FLAG 624 512 0
FLAG -288 528 0
FLAG -480 528 0
FLAG -48 352 +14
FLAG -400 0 +14
FLAG -256 0 +7
FLAG -400 128 0
FLAG -256 128 0
FLAG -128 448 +7
FLAG 592 240 out
FLAG 48 144 1st
FLAG -48 416 0
SYMBOL Opamps\\LT1113 176 304 R0
SYMATTR InstName U1
SYMBOL Opamps\\LT1113 176 64 R0
SYMATTR InstName U2
SYMBOL Opamps\\LT1113 -48 320 R0
SYMATTR InstName U3
SYMBOL pnp 288 416 M180
SYMATTR InstName Q1
SYMBOL npn 288 80 R0
SYMATTR InstName Q2
SYMBOL res 432 272 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 432 416 R0
SYMATTR InstName C1
SYMATTR Value .1µ
SYMBOL cap 560 224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C2
SYMATTR Value 470µ
SYMBOL res 0 224 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res -144 352 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap -320 352 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C3
SYMATTR Value .05µ
SYMBOL cap -272 496 R180
WINDOW 0 24 64 Left 0
WINDOW 3 24 8 Left 0
SYMATTR InstName C4
SYMATTR Value .001µ
SYMBOL res 608 320 R0
SYMATTR InstName R4
SYMATTR Value 4
SYMBOL voltage -480 400 R0
WINDOW 3 -177 -127 Left 0
WINDOW 123 -172 -91 Left 0
WINDOW 39 -128 98 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 .5 1000)
SYMATTR Value2 AC .2
SYMATTR SpiceLine Rser=1k
SYMBOL voltage -400 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 14
SYMBOL voltage -256 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 7
TEXT -72 -64 Left 0 !.tran 10m
  #10   Report Post  
John Larkin
 
Posts: n/a
Default

On 17 Nov 2004 11:37:27 -0800, (Jim Meyer)
wrote:

"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote in message ...
Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?


I just simulated the circuit in LTSpice using LT1113's instead of
the TL084. It simulates quite nicely. The feedback causes the base
drives to swing through the "crossover" region so that's no problem.


OK, now crank in some dc offset voltages on the opamps. There are four
cases.

John



  #11   Report Post  
Andrzej Popowski
 
Posts: n/a
Default

Wed, 17 Nov 2004 05:42:37 -0800, "Watson A.Name - \"Watt Sun, the Dark
Remover\"" wrote:
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.


But they say it works. Well.


It will not work.
Please analyse only output stage: IC C+D and output transistors.

Imagine, that you disconnect input pin 10 on C from pin 12 and 7. Now
compute bias current thru Q1, Q2 as a function of voltage between pin
10 and 12. You will see, that gain of this stage is near infinity, any
positive voltage between 10 and 12 will shortcircuit Q1 and Q2.

Now reconnect your circuit and think about bias current as a function
of input voltage offset of D and C. How long will it work?


--
Pozdrowienia

Andrzej Popowski
  #12   Report Post  
Frank Bemelman
 
Posts: n/a
Default

"Watson A.Name - "Watt Sun, the Dark Remover""
schreef in bericht ...

"Robert Baer" wrote in message
...
"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either

output
transistor because there's no forward bias, then the V drop

'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop

gain
increases to the open loop gain. So it would seem that the amp

would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Start with the "obvious" DC initial conditions: pins 5 and 6 are at
1/2 of the supply voltage.
Note average DC current thru R4 must be exactly zero (am assuming

zero
input bias current in op amps and zero leakage current for C6 and C7).
Then pins 7, 9, 10, 12 and 13 are all within an op-amp Vos of 1/2 of
the supply voltage.
Now we see the dicey part; theoretically (acting seperately), opamp

C
will drive Q1 until the inputs "see" its Vos, and opamp D would drive

Q2
until the inputs "see" its Vos.
Housesomever, zee soykut iss a mess.
The input conditions that opamp C will try to satisfy is virtually
*guaranteed* to be different than the input conditions that opamp D

will
try to satisfy (the Vos of one will be different than the Vos of the
other).
Ignoring that feedback, the conclusion seems to be that the opamp

with
the greater open loop power gain (that includes the transistor) will
(mostly) win, meaning the other transistor will either be driven to
saturation or zener E-B breakdown.
But, remember that no DC current can flow thru R4.
It *does* appear that your supposition of oscillation is correct.
Now, replace the transistors with E-to-B resistors and one still has
the problem.
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.


But they say it works. Well.


If the offsets of C & D have the 'right' polarity, it will work.
But if that is not the case... both transistors will be full on.

So you need a couple of TL084's and find a 'good' one.

--
Thanks, Frank.
(remove 'x' and 'invalid' when replying by email)




  #13   Report Post  
N. Thornton
 
Posts: n/a
Default

Robert Baer wrote in message ...
"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Start with the "obvious" DC initial conditions: pins 5 and 6 are at
1/2 of the supply voltage.
Note average DC current thru R4 must be exactly zero (am assuming zero
input bias current in op amps and zero leakage current for C6 and C7).
Then pins 7, 9, 10, 12 and 13 are all within an op-amp Vos of 1/2 of
the supply voltage.
Now we see the dicey part; theoretically (acting seperately), opamp C
will drive Q1 until the inputs "see" its Vos, and opamp D would drive Q2
until the inputs "see" its Vos.
Housesomever, zee soykut iss a mess.
The input conditions that opamp C will try to satisfy is virtually
*guaranteed* to be different than the input conditions that opamp D will
try to satisfy (the Vos of one will be different than the Vos of the
other).
Ignoring that feedback, the conclusion seems to be that the opamp with
the greater open loop power gain (that includes the transistor) will
(mostly) win, meaning the other transistor will either be driven to
saturation or zener E-B breakdown.
But, remember that no DC current can flow thru R4.
It *does* appear that your supposition of oscillation is correct.
Now, replace the transistors with E-to-B resistors and one still has
the problem.
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.


Yep, I agree with it all... except 'scrap'. The problem is there are 2
feedback loops on the output end opamps, and theyre _connected
together_. Thus the 2 feedbacks cant happen independantly. They might
cooperate, or they might fight and lead the op trs to an MS-release
event (Magic Smoke).

But rather than scrap it, this is easily fixed. Add a couple of 0.1
ohm emitter Rs on the op trs, then you can complete the loop
separately for each tr. The LS is then being driven thru a 0.1 ohm R,
which is quite ok. Think that through... it all works nicely, no
fighting. V offsets become a non event, 2mV across 0.2 ohm is trivial.

The one issue is opamp speed. Call me cautious but I wouldnt be
surprised if they were using something like an LM324. While that does
have workable audio performance (reduced max amplitude above 6kHz is
fairly ok), it can not shift fast enough to deal with crossover
distortion cleanly. To do that would require performance at way above
20kHz.

I also have some hesitations about opamp A see the output load
capacitance, but again thats easily fixed.


NT
  #14   Report Post  
Karl Uppiano
 
Posts: n/a
Default


"N. Thornton" wrote in message
om...
Robert Baer wrote in message
...
"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either
output
transistor because there's no forward bias, then the V drop
'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop
gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Start with the "obvious" DC initial conditions: pins 5 and 6 are at
1/2 of the supply voltage.
Note average DC current thru R4 must be exactly zero (am assuming zero
input bias current in op amps and zero leakage current for C6 and C7).
Then pins 7, 9, 10, 12 and 13 are all within an op-amp Vos of 1/2 of
the supply voltage.
Now we see the dicey part; theoretically (acting seperately), opamp C
will drive Q1 until the inputs "see" its Vos, and opamp D would drive Q2
until the inputs "see" its Vos.
Housesomever, zee soykut iss a mess.
The input conditions that opamp C will try to satisfy is virtually
*guaranteed* to be different than the input conditions that opamp D will
try to satisfy (the Vos of one will be different than the Vos of the
other).
Ignoring that feedback, the conclusion seems to be that the opamp with
the greater open loop power gain (that includes the transistor) will
(mostly) win, meaning the other transistor will either be driven to
saturation or zener E-B breakdown.
But, remember that no DC current can flow thru R4.
It *does* appear that your supposition of oscillation is correct.
Now, replace the transistors with E-to-B resistors and one still has
the problem.
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.


Yep, I agree with it all... except 'scrap'. The problem is there are 2
feedback loops on the output end opamps, and theyre _connected
together_. Thus the 2 feedbacks cant happen independantly. They might
cooperate, or they might fight and lead the op trs to an MS-release
event (Magic Smoke).

But rather than scrap it, this is easily fixed. Add a couple of 0.1
ohm emitter Rs on the op trs, then you can complete the loop
separately for each tr. The LS is then being driven thru a 0.1 ohm R,
which is quite ok. Think that through... it all works nicely, no
fighting. V offsets become a non event, 2mV across 0.2 ohm is trivial.

The one issue is opamp speed. Call me cautious but I wouldnt be
surprised if they were using something like an LM324. While that does
have workable audio performance (reduced max amplitude above 6kHz is
fairly ok), it can not shift fast enough to deal with crossover
distortion cleanly. To do that would require performance at way above
20kHz.

I also have some hesitations about opamp A see the output load
capacitance, but again thats easily fixed.


We're taking a flawed design, and adding band-aids on top of band-aids. You
can make a perfectly good amplifier with one opamp and two push-pull emitter
followers biased with a couple of diodes, similar to the first design
sketched in the OP's link. If that design draws too much idle current,
increase the emitter resistor. There's lots of stuff you can do to improve
that design without resorting to the demented design being proposed.


  #15   Report Post  
John Larkin
 
Posts: n/a
Default

On Wed, 17 Nov 2004 22:49:08 GMT, "Karl Uppiano"
wrote:

We're taking a flawed design, and adding band-aids on top of band-aids. You
can make a perfectly good amplifier with one opamp and two push-pull emitter
followers biased with a couple of diodes, similar to the first design
sketched in the OP's link. If that design draws too much idle current,
increase the emitter resistor. There's lots of stuff you can do to improve
that design without resorting to the demented design being proposed.


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.

John



  #16   Report Post  
Dave Platt
 
Posts: n/a
Default

In article ,
John Larkin wrote:

We're taking a flawed design, and adding band-aids on top of band-aids. You
can make a perfectly good amplifier with one opamp and two push-pull emitter
followers biased with a couple of diodes, similar to the first design
sketched in the OP's link. If that design draws too much idle current,
increase the emitter resistor. There's lots of stuff you can do to improve
that design without resorting to the demented design being proposed.


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.


Seems like a reasonable idea, *if* you do the feedback loops right.

In your case, I'd guess that you have a unity- or small-gain feedback
loop wrapped around each individual opamp-and-transistor (tapping off
between the transistor source and the ballast resistor?), and then an
outer feedback loop from the final output back to an earlier stage (a
pre-driver op amp which then feeds the driver op amps?). As long as
these loops are speed-compensated properly, this would probably be
quite safe... some local feedback and some global feedback.

The problemms come up when you have multiple op amps and feedback
loops in parallel in a way which allows them to fight, or have
"wrapped" feedback loops with inappropriate time constants.

--
Dave Platt AE6EO
Hosting the Jade Warrior home page: http://www.radagast.org/jade-warrior
I do _not_ wish to receive unsolicited commercial email, and I will
boycott any company which has the gall to send me such ads!
  #17   Report Post  
Phil Allison
 
Posts: n/a
Default


"John Larkin"


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.



** What fets are P ch, 300 watts and 400 volts ??

Is a bank loan needed to pay for them ??




.................. Phil




  #18   Report Post  
John Larkin
 
Posts: n/a
Default

On Thu, 18 Nov 2004 11:27:45 +1100, "Phil Allison"
wrote:


"John Larkin"


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.



** What fets are P ch, 300 watts and 400 volts ??

Is a bank loan needed to pay for them ??




................. Phil




IXTH11P50, 500 volts, 300 watts. My stock report shows $7.55 each,
which is likely 100+ pricing. Nice part, very rugged.

John

  #19   Report Post  
Phil Allison
 
Posts: n/a
Default


"John Larkin"
"Phil Allison"

** What fets are P ch, 300 watts and 400 volts ??

Is a bank loan needed to pay for them ??



IXTH11P50, 500 volts, 300 watts. My stock report shows $7.55 each,
which is likely 100+ pricing. Nice part, very rugged.

John



** Thanks.




............. Phil



  #20   Report Post  
Karl Uppiano
 
Posts: n/a
Default


"John Larkin" wrote in
message ...
On Wed, 17 Nov 2004 22:49:08 GMT, "Karl Uppiano"
wrote:

We're taking a flawed design, and adding band-aids on top of band-aids.
You
can make a perfectly good amplifier with one opamp and two push-pull
emitter
followers biased with a couple of diodes, similar to the first design
sketched in the OP's link. If that design draws too much idle current,
increase the emitter resistor. There's lots of stuff you can do to improve
that design without resorting to the demented design being proposed.


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that. It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.

John


I'm not saying it can't be done, but for the application at hand (a low
power amp running on a single supply) it seems simpler is better.




  #21   Report Post  
Watson A.Name - \Watt Sun, the Dark Remover\
 
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Default


"Arny Krueger" wrote in message
...
"Watson A.Name - "Watt Sun, the Dark Remover""
wrote in message

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm


When the amp is idle, and there's no(?) current flowing in either
output transistor because there's no forward bias, then the V drop
'resistance' of the E-B junction adds to the 100k feedback resistor,
so the loop gain increases to the open loop gain. So it would seem
that the amp would attempt to hunt in this region, possibly
oscillating?


Depends on the op amp. I stopped taking this circuit page seriously

when I
saw "741" on the upper two circuit diagrams.


The guy's a HAM, cut him a little slack, OK?

Do you know what a 741 is from the standpoint of quality audio?

Anathema!

If you keep the gain down to 10 or less, it's almost Hi-Fi. ;-)

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.


It's a variation on what some designers call "current dumping".


However let's say the truth - this is an outdated, amateurish design

with no
known merits over established technology.


Well, didn't I say that I didn't think much of it? This guy _is_ an
amateur, AKA HAM. Also, if you investigate this guy's web pages, you'll
find he's enormously prolific, with gobs of schematics of circuits he's
built. In the true spirit of experimentation, you'll notice.

And you don't see this particular type of design in copmmercial
equipment, as I said. Which leads me to believe there are some inherent
disadvantages. I'm asking for insight into what these might be, not
destruictive criticism.

I have a number of schematics of audio power amps that I think have some
disadvantages which I wouldn't use. One is that the design connects one
terminal of the speaker to the Vcc, and lets DC thru the speaker bias
the output stage. This gives the same effect as bootstrapping. But it
also makes the speaker hot relative to ground, which isn't a problem if
the amp and speaker are in the same enclosure and isolated. So I would
consider this unacceptable, and use the bootstrapping method instead.


  #22   Report Post  
Watson A.Name - \Watt Sun, the Dark Remover\
 
Posts: n/a
Default


"Rich Grise" wrote in message
news
On Wed, 17 Nov 2004 05:42:37 -0800, Watson A.Name - "Watt Sun, the

Dark

"Robert Baer" wrote in message

...
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.


But they say it works. Well.

^^^^

Is this an adverb, or an interjection? ;-)


Sorry for the confloosion. It's an adverb. "It works well," he said,
with low 'torsion' [distortion]. Hey, give him a break, he has also
learned German, and 'Engrish' seems to be his 3rd language(!) Once you
learn German, there's no more room for Engrish in your head! :-[



Thanks,
Rich



  #23   Report Post  
Watson A.Name - \Watt Sun, the Dark Remover\
 
Posts: n/a
Default


"Dave Platt" wrote in message
...
In article ,
Rich Grise wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either

output
transistor because there's no forward bias, then the V drop

'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop

gain
increases to the open loop gain. So it would seem that the amp

would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.


Hey, Watson. :-)

I'm going to level with you, I'm not an expert, I just play one on

the
internet. But it looks to me like the gain of the output stage -

you're
talking about the one with an opamp per each output tranny, right? -

is
strapped such that the opamp's loop gain predominates, and I would

not be
a bit surprised to see the circuit behave just as you describe

(emitter
followers are notoriously fast), with two caveats: The slew rate of

the
opamps, and something about a pole or a zero in the complex impedance

at
that horrendous huge output cap.


I'm not an expert either, but I have a Bad Feeling about this design.
It seems to me that it assumes the existence of theoretically-perfect
components with ideal matching (between IC2 and IC2, and between the
various Tr1 and Tr2 parallel transistors).

I'd be very concerned about the effect of any input offset voltage
difference which might exist between IC2 and IC3. It looks to me as
if the two op amps could end up "fighting" one another pretty badly.
If the input offset voltages are offset from one another in one
direction, the bias in the output transistors would probably tend down
towards zero, and distortion might result. If the offsets are in the
opposite direction, (e.g. if IC2 wanted to see a slightly more
positive voltage on its inverting input than IC1 did, for a given
noninverting input voltage) then the op amp output voltages would
diverge in opposite directions, turning both Tr1 and Tr2 quite hard,
and quite possibly driving them out of their safe operating areas.


I think you need to get a handle on that "safe operating area", I think
it's not used in that context.

Add to this the fact that the design doesn't include base resistors
for the transistors, or emitter ballast resistors for the paralleled
Tr1 and Tr2 transistor clusters, and I think you've got a recipe for
serious instability (oscillatory and thermal) and for the emission of
copious quantities of Magic Blue Smoke.


Well, that's what I tend to be concerned about. Thanks.

--
Dave Platt

AE6EO
Hosting the Jade Warrior home page:

http://www.radagast.org/jade-warrior
I do _not_ wish to receive unsolicited commercial email, and I will
boycott any company which has the gall to send me such ads!



  #24   Report Post  
Watson A.Name - \Watt Sun, the Dark Remover\
 
Posts: n/a
Default


"Jim Meyer" wrote in message
om...
"Watson A.Name - \"Watt Sun, the Dark Remover\""

wrote in message
...
Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either

output
transistor because there's no forward bias, then the V drop

'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop

gain
increases to the open loop gain. So it would seem that the amp

would
attempt to hunt in this region, possibly oscillating?


I just simulated the circuit in LTSpice using LT1113's instead of
the TL084. It simulates quite nicely. The feedback causes the base
drives to swing through the "crossover" region so that's no problem.

Here's a "cut-n-paste" ASCII file for the input to LTSpice:


Thanks for the sim. [snip]

Swing thru rather quickly I would guess. And doing so with the
possibility of overcorrecting? Or hunting about trying to find a place
it can never find? Or having two opamps, the phase shift might be too
great at high freqs. Or..


  #25   Report Post  
Watson A.Name - \Watt Sun, the Dark Remover\
 
Posts: n/a
Default


"Andrzej Popowski" wrote in message
...
Wed, 17 Nov 2004 05:42:37 -0800, "Watson A.Name - \"Watt Sun, the Dark
Remover\"" wrote:
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.


But they say it works. Well.


It will not work.
Please analyse only output stage: IC C+D and output transistors.

Imagine, that you disconnect input pin 10 on C from pin 12 and 7. Now
compute bias current thru Q1, Q2 as a function of voltage between pin
10 and 12. You will see, that gain of this stage is near infinity, any
positive voltage between 10 and 12 will shortcircuit Q1 and Q2.

Now reconnect your circuit and think about bias current as a function
of input voltage offset of D and C. How long will it work?


Good question. Thanks.

--
Pozdrowienia


Andrzej Popowski





  #26   Report Post  
Rich The Philosophizer
 
Posts: n/a
Default

On Wed, 17 Nov 2004 18:59:57 -0800, Watson A.Name - "Watt Sun, the Dark Remover" wrote:


"Rich Grise" wrote in message
news
On Wed, 17 Nov 2004 05:42:37 -0800, Watson A.Name - "Watt Sun, the

Dark

"Robert Baer" wrote in message

...
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.

^^^^

Is this an adverb, or an interjection? ;-)


Sorry for the confloosion. It's an adverb. "It works well," he said,
with low 'torsion' [distortion]. Hey, give him a break, he has also
learned German, and 'Engrish' seems to be his 3rd language(!) Once you
learn German, there's no more room for Engrish in your head! :-[

Oh, the answer to that one is simple. Just go out of your head! %-}

Cheers!
Rich

  #27   Report Post  
Robert Baer
 
Posts: n/a
Default

"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote:

"Rich Grise" wrote in message
news
On Wed, 17 Nov 2004 05:42:37 -0800, Watson A.Name - "Watt Sun, the

Dark

"Robert Baer" wrote in message

...
Zhoe, vee zee zhat zee soykut iss a mess.
sCRAP.

But they say it works. Well.

^^^^

Is this an adverb, or an interjection? ;-)


Sorry for the confloosion. It's an adverb. "It works well," he said,
with low 'torsion' [distortion]. Hey, give him a break, he has also
learned German, and 'Engrish' seems to be his 3rd language(!) Once you
learn German, there's no more room for Engrish in your head! :-[

Thanks,
Rich


A long time ago i made an RF amplifier using an Esaki ("tunnel")
Diode.
It was rather puzzling, in that the gain was very low and could not be
improved.
Further analysis showed that the dern thing was oscillating like a
banshee at a substantially higher frequency.
Another thought: the "joke" that if you want an oscillator, build or
design an amplifier (and vice-versa).
  #28   Report Post  
Kevin Aylward
 
Posts: n/a
Default

John Larkin wrote:
On Wed, 17 Nov 2004 22:49:08 GMT, "Karl Uppiano"
wrote:

We're taking a flawed design, and adding band-aids on top of
band-aids. You can make a perfectly good amplifier with one opamp
and two push-pull emitter followers biased with a couple of diodes,
similar to the first design sketched in the OP's link. If that
design draws too much idle current, increase the emitter resistor.
There's lots of stuff you can do to improve that design without
resorting to the demented design being proposed.


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that.


Bloody hell. That's some amp, probably about 20KW out. This will
certainly kick the **** out of you at 50 Hz.

How did you get the opamp voltage rating, or was it a discrete one?

It forces essentially perfect current
sharing, nukes the device tc and part-part variations, and makes lots
of gate drive available.


So long as the loop is stable its ok.

Kevin Aylward

http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.


  #29   Report Post  
Phil Allison
 
Posts: n/a
Default


"Robert Baer"

A long time ago i made an RF amplifier using an Esaki ("tunnel")
Diode.
It was rather puzzling, in that the gain was very low and could not be
improved.
Further analysis showed that the dern thing was oscillating like a
banshee at a substantially higher frequency.
Another thought: the "joke" that if you want an oscillator, build or
design an amplifier (and vice-versa).




** Looks to me like young Robert has just come up with another corollary
to the ever growing set of "Laws" popularly attributed to the famous USAF
Major Murphy that likely rates recording somewhere for posterity .

Or has he perhaps been beaten to it by another ??





............ Phil


  #30   Report Post  
N. Thornton
 
Posts: n/a
Default

"Watson A.Name - \"Watt Sun, the Dark Remover\"" wrote in message ...

Swing thru rather quickly I would guess. And doing so with the
possibility of overcorrecting?


inevitably, since opamps are frequency and slew limited, there will
always be a little undershoot then overshoot. But this is not a
problem, it just introduces very small ultrasonic artefacts. It
happens in every class B with feedback, and is pretty much a non
issue. Note that feedback on class B doesnt eliminate distortion, it
just moves it up out of the useful frequency band.

Or hunting about trying to find a place
it can never find?


It might possibly do that during idle, but the consequences are none.
The output still stays at 0, or extremely close to it, with any
artefacts being ultrasonic. again, same as any class B with large nfb.
In practice output trs have very low gain when theyre just beginning
to conduct, so it would probably be stable in that respect.

Or having two opamps, the phase shift might be too
great at high freqs. Or..


Thats a problem, especially with a capacitive load. Combined with the
amps output R you get an RC that youre taking feedback from. However,
I've used simple clas B output tr pair plus corecting opamp before
without any problem. The problem in the design offered is the fighting
joined feedback loops - but its easily fixed.


NT


  #31   Report Post  
N. Thornton
 
Posts: n/a
Default

"Arny Krueger" wrote in message ...
"Watson A.Name - "Watt Sun, the Dark Remover""
wrote in message


Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm


When the amp is idle, and there's no(?) current flowing in either
output transistor because there's no forward bias, then the V drop
'resistance' of the E-B junction adds to the 100k feedback resistor,
so the loop gain increases to the open loop gain. So it would seem
that the amp would attempt to hunt in this region, possibly
oscillating?


Depends on the op amp. I stopped taking this circuit page seriously when I
saw "741" on the upper two circuit diagrams.


Lets at least be fair, the earlier circuits on that page make it quite
clear its not an attempt at quality audio. He's playing with ideas,
and quality is not an inherent part of some designs. But the 741, I
would be in no rush to use them - maybe 20 years ago, and even then I
found 748s superior.


NT
  #32   Report Post  
John Larkin
 
Posts: n/a
Default

On Thu, 18 Nov 2004 10:09:19 GMT, "Kevin Aylward"
wrote:


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power amp
that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch, +-200 volt
rails) and do just that.


Bloody hell. That's some amp, probably about 20KW out. This will
certainly kick the **** out of you at 50 Hz.

How did you get the opamp voltage rating, or was it a discrete one?


It's a transconductance amp, so the fet sources are at the rails
(through current-sense resistors) and the drains are the output. So
the gate-drive fets work on the +-200 power supply rails (with small
floating local supplies) and only need to swing enough to drive the
gates.

Nice thing here is that all 32 fet drains are common, so they are
bolted (actually clamped) to copper heat spreaders on the main
heatsink, without insulators.

So long as the loop is stable its ok.


Well, sure!

John


  #33   Report Post  
Kevin Aylward
 
Posts: n/a
Default

John Larkin wrote:
On Thu, 18 Nov 2004 10:09:19 GMT, "Kevin Aylward"
wrote:


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power
amp that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch,
+-200 volt rails) and do just that.


Bloody hell. That's some amp, probably about 20KW out. This will
certainly kick the **** out of you at 50 Hz.

How did you get the opamp voltage rating, or was it a discrete one?


It's a transconductance amp, so the fet sources are at the rails
(through current-sense resistors) and the drains are the output. So
the gate-drive fets work on the +-200 power supply rails (with small
floating local supplies) and only need to swing enough to drive the
gates.


I have recently been playing with both source out and drain out
configurations for that super duper amp I mentioned in one post. One
issue with the drain out is x-over spikes. I was getting 100A thick
x-over spikes in the drain output, verses essentially, none in the
source output. The gates tied together prevents the spike when slewing.
So, worth noting if you want the utmost in speed without frying the
devices in a linear amp.



Kevin Aylward

http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.


  #34   Report Post  
John Larkin
 
Posts: n/a
Default

On Thu, 18 Nov 2004 17:37:26 GMT, "Kevin Aylward"
wrote:

John Larkin wrote:
On Thu, 18 Nov 2004 10:09:19 GMT, "Kevin Aylward"
wrote:


It's actually not a bad idea to have an opamp per output transistor,
if you do it right, which this guy clearly hasn't. I make a power
amp that uses 32 300-watt fets in the output (16 p-ch, 16 n-ch,
+-200 volt rails) and do just that.

Bloody hell. That's some amp, probably about 20KW out. This will
certainly kick the **** out of you at 50 Hz.

How did you get the opamp voltage rating, or was it a discrete one?


It's a transconductance amp, so the fet sources are at the rails
(through current-sense resistors) and the drains are the output. So
the gate-drive fets work on the +-200 power supply rails (with small
floating local supplies) and only need to swing enough to drive the
gates.


I have recently been playing with both source out and drain out
configurations for that super duper amp I mentioned in one post. One
issue with the drain out is x-over spikes. I was getting 100A thick
x-over spikes in the drain output, verses essentially, none in the
source output. The gates tied together prevents the spike when slewing.
So, worth noting if you want the utmost in speed without frying the
devices in a linear amp.



I'm driving a mostly-inductive load, with overall current feedback, so
the current-out stage makes sense for me; it keeps the loop dynamics
from depending on the load, which is valuable. An audio or such amp is
better of it has an inherently low z-out, sor the same sorts of
reasons.

As far as crossover goes, that is interesting. My output stage drive
signal is grounded, and I have a splitter circuit to convert it into
sinking and sourcing currents to get up to the floating +side and
-side power stages, which are essentially current mirrors. The
splitter must sustain a small idle current on both outputs and also
perfectly split the input signal, so that positive inputs increase the
sink current and negative sigs increase the source current. I've been
tuning this circuit for years, gradually converging on something that
works pretty well. It's an interesting, philosophically disturbing,
problem.

For a voltage-out amp, it would be cool to float a, say, +-12 volt
supply on the output node and hang an opamp to close the loop around
each fet, making an ideal follower. Then you'd be able to run the fets
all the way to the power rails, and you could use very small source
sense resistors, with just millivolts of idle voltage.

John



  #35   Report Post  
Rich Grise
 
Posts: n/a
Default

On Thu, 18 Nov 2004 22:20:57 +1100, Phil Allison wrote:


"Robert Baer"

A long time ago i made an RF amplifier using an Esaki ("tunnel")
Diode.
It was rather puzzling, in that the gain was very low and could not be
improved.
Further analysis showed that the dern thing was oscillating like a
banshee at a substantially higher frequency.
Another thought: the "joke" that if you want an oscillator, build or
design an amplifier (and vice-versa).




** Looks to me like young Robert has just come up with another corollary
to the ever growing set of "Laws" popularly attributed to the famous USAF
Major Murphy that likely rates recording somewhere for posterity .

Or has he perhaps been beaten to it by another ??

Considering I first heard it in about 1963, I'd say so. ;-)

Cheers!
Rich



  #36   Report Post  
Kevin Aylward
 
Posts: n/a
Default

John Larkin wrote:
On Thu, 18 Nov 2004 17:37:26 GMT, "Kevin Aylward"
wrote:

John Larkin wrote:
On Thu, 18 Nov 2004 10:09:19 GMT, "Kevin Aylward"
wrote:


It's actually not a bad idea to have an opamp per output
transistor, if you do it right, which this guy clearly hasn't. I
make a power amp that uses 32 300-watt fets in the output (16
p-ch, 16 n-ch, +-200 volt rails) and do just that.

Bloody hell. That's some amp, probably about 20KW out. This will
certainly kick the **** out of you at 50 Hz.

How did you get the opamp voltage rating, or was it a discrete one?


It's a transconductance amp, so the fet sources are at the rails
(through current-sense resistors) and the drains are the output. So
the gate-drive fets work on the +-200 power supply rails (with small
floating local supplies) and only need to swing enough to drive the
gates.


I have recently been playing with both source out and drain out
configurations for that super duper amp I mentioned in one post. One
issue with the drain out is x-over spikes. I was getting 100A thick
x-over spikes in the drain output, verses essentially, none in the
source output. The gates tied together prevents the spike when
slewing. So, worth noting if you want the utmost in speed without
frying the devices in a linear amp.



I'm driving a mostly-inductive load, with overall current feedback, so
the current-out stage makes sense for me; it keeps the loop dynamics
from depending on the load, which is valuable. An audio or such amp is
better of it has an inherently low z-out, sor the same sorts of
reasons.

As far as crossover goes, that is interesting.


Of course in a real audio amp, one doesn't put a 500Khz square wave in
to see this particular "problem". For specmanship it is. One cant do the
test with out a fire.

My output stage drive
signal is grounded, and I have a splitter circuit to convert it into
sinking and sourcing currents to get up to the floating +side and
-side power stages, which are essentially current mirrors. The
splitter must sustain a small idle current on both outputs and also
perfectly split the input signal, so that positive inputs increase the
sink current and negative sigs increase the source current. I've been
tuning this circuit for years, gradually converging on something that
works pretty well. It's an interesting, philosophically disturbing,
problem.

For a voltage-out amp, it would be cool to float a, say, +-12 volt
supply on the output node and hang an opamp to close the loop around
each fet, making an ideal follower.


Again, potential issue of stability. I do have an interesting, somwhat
original output circuit that does this with a first order loop enclosing
the outputs. It gets me wonderfully low distortion at 20Khz. In one
sense topologically its essentially the same as other compound pairs,
but this does behave a little different. The feedback diodes are zeners
at 10V. The drive circuit on its own 0.0001% THD 20Khz, according to
spice that is. Note the feedback transisters can be low voltage ones,
hence fast ones. DC loop gain is 135db, open loop more!

http://www.anasoft.co.uk/Mospoweramp.jpg


Kevin Aylward

http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.


  #37   Report Post  
Arny Krueger
 
Posts: n/a
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On Thu, 18 Nov 2004 17:37:26 GMT, "Kevin Aylward"
wrote:


I'm driving a mostly-inductive load, with overall current feedback,
so the current-out stage makes sense for me; it keeps the loop
dynamics from depending on the load, which is valuable. An audio or
such amp is better of it has an inherently low z-out, sor the same
sorts of reasons.


Shaker table driver?


  #38   Report Post  
John Larkin
 
Posts: n/a
Default

On Fri, 19 Nov 2004 13:16:44 GMT, "Kevin Aylward"
wrote:

Again, potential issue of stability. I do have an interesting, somwhat
original output circuit that does this with a first order loop enclosing
the outputs. It gets me wonderfully low distortion at 20Khz. In one
sense topologically its essentially the same as other compound pairs,
but this does behave a little different. The feedback diodes are zeners
at 10V. The drive circuit on its own 0.0001% THD 20Khz, according to
spice that is. Note the feedback transisters can be low voltage ones,
hence fast ones. DC loop gain is 135db, open loop more!

http://www.anasoft.co.uk/Mospoweramp.jpg



One problem here is current sharing. Linear-mode paralleled mosfets
don't do it very well. One of my earlier gradient amps was done with
paralleled fets (with source resistors, at least) and we wound up
making a fixture so we could match sets of fets for production... a
real pain in the sternparts. The advantage of an opamp per fet is that
the gate drive becomes very simple and sharing is forced to be
perfect.

John


  #39   Report Post  
Kevin Aylward
 
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John Larkin wrote:
On Fri, 19 Nov 2004 13:16:44 GMT, "Kevin Aylward"
wrote:

Again, potential issue of stability. I do have an interesting,
somwhat original output circuit that does this with a first order
loop enclosing the outputs. It gets me wonderfully low distortion at
20Khz. In one sense topologically its essentially the same as other
compound pairs, but this does behave a little different. The
feedback diodes are zeners at 10V. The drive circuit on its own
0.0001% THD 20Khz, according to spice that is. Note the feedback
transisters can be low voltage ones, hence fast ones. DC loop gain
is 135db, open loop more!

http://www.anasoft.co.uk/Mospoweramp.jpg



One problem here is current sharing. Linear-mode paralleled mosfets
don't do it very well.


Yes, yes yes I do know all about this:-)

....but they're not that bad either, when compared to bipolar.

One of my earlier gradient amps was done with
paralleled fets (with source resistors, at least) and we wound up
making a fixture so we could match sets of fets for production... a
real pain in the sternparts.


On might well be surprised just how well they match in same batches. Its
unlikely to be more than a 2/1 mismatch at say 8 volts drive. Dropping a
volt or so at max current via source resisters is always an option. It
depends on the application. In audio power amps, the reality is, if its
running max output and not clipping, then the average power is way way
less for music signals. Indeed, in my MOSFET1000 (500W per chan) the
transformer was only rated at 800W. I can tell you, transformers never
blow under these conditions, despite worst case saying the will. Its
knowing when to engineering cheat. My own MOSFET1000 has been going
strong for nearly 20 years now, and it has no source resisters in the
design.

For real applicatons where a amp is actually going to be outputing its
ratings contineously, one has to be a bit more carefull.

The advantage of an opamp per fet is that
the gate drive becomes very simple and sharing is forced to be
perfect.


Yes, but as I noted, there is the pole of the opamp, and the pole of
rout with the fets, plus all the other op-amp parasitics. Its the old
frequency verses accuracy trade off. Anyway, its cheating to use an
op-amp:-)

My none output feedback version is
here.http://www.anasoft.co.uk/Mospoweramp2.jpg. This is quite a bit
faster as it needs less compensation. It still does 0.005% at 20k,
8ohms, 500 Watts, in spice of course.

Why do you think I tied the caps at the gates, instead of he push pull
emitters?

Kevin Aylward

http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.


  #40   Report Post  
John Larkin
 
Posts: n/a
Default

On Fri, 19 Nov 2004 19:02:29 GMT, "Kevin Aylward"
wrote:


Yes, but as I noted, there is the pole of the opamp, and the pole of
rout with the fets, plus all the other op-amp parasitics. Its the old
frequency verses accuracy trade off. Anyway, its cheating to use an
op-amp:-)


But Kevin, inside every opamp are lots of little transistors! That
should make you happy.

John


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