On Wed, 17 Nov 2004 00:18:38 -0800, Watson A.Name - "Watt Sun, the Dark Remover" wrote:

Opinions on this, especially the 2.5W amp schem at the bottom.
http://www.intio.or.jp/jf10zl/EF.htm

When the amp is idle, and there's no(?) current flowing in either output
transistor because there's no forward bias, then the V drop 'resistance'
of the E-B junction adds to the 100k feedback resistor, so the loop gain
increases to the open loop gain. So it would seem that the amp would
attempt to hunt in this region, possibly oscillating?

Maybe a 1k resistor E to B on the output transistors would 'bypass'
this. Or should the amp be biased to work class AB.

Hey, Watson. :-)

I'm going to level with you, I'm not an expert, I just play one on the
internet. But it looks to me like the gain of the output stage - you're
talking about the one with an opamp per each output tranny, right? - is
strapped such that the opamp's loop gain predominates, and I would not be
a bit surprised to see the circuit behave just as you describe (emitter
followers are notoriously fast), with two caveats: The slew rate of the
opamps, and something about a pole or a zero in the complex impedance at
that horrendous huge output cap.

But that's just a butt-level[0] feeling, so take it for what it's
worth, and let any uselessness go. :-)

Cheers!
Rich

[0] i.e., seat-of-the pants driving by a bench tech. ;-)