Andre Yew wrote:
"Rusty Boudreaux" wrote in message ...

However, your argument using general processors is not
valid. In the realm of DSPs and ASICs this level of processing
power is certainly achievable at modest cost.

Not true.

I disagree. If we're using brute-force FIR techniques, name me an
affordable computation system that can achieve 16 billion 32-bit
integer MACs per second.

This is the problem with these outrageous sample rates. Why do we
need to process at a rate in which over 50 percent of the available
bandwidth is unused?

A single TI TMS320C6416 can achieve 2.88 billion 16-bit MACs/ second.

http://focus.ti.com/lit/ds/symlink/tms320c6416.pdf

It has a clock speed of 720 MHz and does 4 16x16 multiplies per cycle.
If you use one per channel you can achieve a 1 second FIR at 44.1 kHz.
However, even this won't do what you actually asked for, which is
32-bit MACs, not 16-bit.

In any case, at over $300 a pop, they aren't cheap. I agree, Rusty is
wrong - this level of processing is currently not available at modest cost.

One solution, as Denis points out, is smarter algorithms that require
less computation load. Optimized FIRs,

Optimized FIRs? Never heard of that phrase. One way of efficiently
computing a convolution is "frequency domain filtering." Essentially
you use the convolution == multiplication property of Fourier transforms,
converting your time data into the frequency domain, performing the
multiplication, and then inverse transforming. That algorithm is
o(N*log(N)), instead of o(N^2) as the brute force method is.

or decimation are two ways to

Yes, decimation is reasonable. 48 kHz was a fine sample rate - we
didn't need to throw it away and go to 96 kHz.
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